A high-efficiency and compact charge pump with charge recycling scheme and finger boost capacitor

A 16-phase 8-branch charge pump with finger boost capacitor is proposed to increase the power efficiency. Compared with the standard capacitor, the finger capacitor can significantly reduce the parasitic capacitance. The proposed four-stage charge pump with finger capacitor can achieve 14.2 V output voltage from a 3 V power supply. The finger capacitor can increase the power efficiency of the charge pump to 60.5% and save chip area as well

Introduction of a pseudo-6th order ISDN splitter with bandstop topology

A newly developed ‘integrated services digital network’ (ISDN) splitter with bandstop (BS) topology is presented and compared to an actual ISDN splitter with a traditional lowpass (LP) topology. The LP-to-BS topology change reduced the amount of filter stages: a LP ISDN splitter requires an 8th order elliptic-like filter in order to be compliant to the standard ‘TS 101 952-1-4 V1.1.1’ [1] of the European Telecommunications Standards Institute (ETSI), whereas the BS ISDN splitter only needs a pseudo-6th order elliptic-like filter. The design of the new BS ISDN filter is discussed in the light of the enforced ETSI specifications. Furthermore, both the ISDN splitters are compared in the field of their specific stopband performance and their physical implementation. The area reduction that comes together with the introduction of the new ISDN splitter with BS topology is more than 25%

A monolithic high-voltage driver circuit based on a Dickson charge pump for MEMS actuator applications

—A monolithic high-voltage driver circuit is proposed for use in MEMS applications. To improve the efficiency of the driver circuit, an advanced charge recycling strategy and finger capacitor structure are implemented in the Dickson charge pump which acts as the high-voltage generator and can boost the output voltage to 100.9 V from a 3 V power supply. The roposed driver circuit offers an output voltage which can linearly sweep from 0 V to 100.9 V under zero-load conditions. By means of the feedback circuit, the driver circuit also can self-adjust the clock frequency to minimize the voltage variation caused by changes in the load conditions

A synchronous rectifier for isolated forward DC-DC converters, integrated in a high-voltage smart-power IC technology

The synchronous rectifier in isolated forward DC-DC converters is traditionally built with discrete DMOS power transistors driven directly from the secondary winding of the pulse transformer. Unfortunately, this technique induces very high switching losses, especially at high switching frequency. This paper presents a new synchronous rectifier topology that drives the DMOS devices in a much more power-efficient manner, employing an additional DC-DC buck converter, and that allows monolithic integration of the whole synchronous rectifier electronics in a suitable high-voltage smart-power IC technology. Special circuitry for suppressing sub-threshold conduction of the DMOS devices is also provided on the chip

An active clamping H-bridge for isolated forward DC-DC converters, integrated in a high-voltage smart-power IC technology

Conventional active clamping circuits for driving the pulse transformer in isolated forward DC-DC converters put considerable voltage stress on the DMOS power devices at high duty ratio. This is not so much an issue for an implementation based on discrete DMOS components, but monolithic integration becomes nearly impossible. This paper presents a new 4-transistor active clamping H-bridge topology that significantly reduces the voltage requirements and allows integration in a junction-isolated smart-power IC technology

Active matrix vacuum fluorescent display with CdSe: In TFTs

The pixel design and CdSe TFT process scheme for a active matrix vacuum fluorescent display (AMVFD) is presented. The display has 64 by 48 full-colour pixels with 256 grey levels. For this design high mobility and high voltage CdSe:In TFTs are used